Condition Code
CPU Instruction for flow control
# Condition Code (Implicit Setting)
All 1-bit flags, not set directly
# Single Bit Registers
CF: Carry Flag (for unsigned)SF: Sign Flag (for signed)ZF: Zero FlagOF: Overflow Flag (for signed)
# Condition Codes (Explicit Setting: Compare)
Used for compare two valuescmpq SRC2, SRC1 : Reversed ordercmpq b,a like computing a-b without setting destination
CFset if carry out from most significant bit (used for unsigned comparisons)ZFset if a == bSFset if (a-b) < 0 (as signed)(negative)OFset if two’s-complement (signed) overflow (a>0 && b<0 && (a-b)<0) || (a<0 && b>0 && (a-b)>0)
# Condition Codes (Explicit Setting: Test)
testq Src2, Src1testq b,a like computing a&b without setting destination
Sets condition codes based on value of Src1 & Src2
Useful to have one of the operands be a mask
ZFset whena&b == 0SFset whena&b < 0
Use set to access condition code